Progressively more sophisticated interconnection technology is needed as VLSI technology drops below 0.13 μm. This decrease in device size has made it increasingly more difficult to provide an interconnection technology that satisfies the requirements of low resistance capacitance (RC) metal interconnect properties.
Signal transport speed is a very important concern in the semiconductor processing art for obvious performance reasons. The signal transport speed of semiconductor circuitry (RC time constant) varies inversely with the RC of the metal interconnections. As integrated circuits become more complex and feature sizes decrease, the effect of the RC time constant on signal delay becomes greater.
Insulating inter-metal dielectric (IMD) layers are typically used in back-end semiconductor processing to fabricate metal interconnect structures. The IMD layers, however, contribute capacitance to the metal interconnect structures which undesirably reduces the signal transport speed of the semiconductor circuitry.
Methods have been devised to reduce the capacitance contribution of the IMD layers to the RC time constant, in order to increase signal transport speed of the semiconductor circuitry. One method that reduces the capacitance contribution of the IMD layers and thus, allows faster signal transport speeds, involves forming the IMD layers with a low-k dielectric material. Unfortunately, low-k dielectric materials have loss chemical bonding structures (Si—CH3), large pore sizes, and high interconnectivity between pores. Hence, subsequently performed semiconductor patterning processes such as etching, ashing, deposition, and wet processes, to name a few, often damage low-k dielectric materials, which in turn, degrades (increase) their dielectric constants.
FIG. 1 depicts a plurality of bar graphs which compare the dielectric constants of conventionally formed low-k dielectric films before and after performing various etching and cleaning processes associated with, for example, semiconductor patterning. As can be seen, each conventionally formed, low-k dielectric film exhibited an increase in dielectric constant (i.e., dielectric constant degradation). The increases in dielectric constant are due to the physical and/or chemical damage sustained by the low-k films during the etching and/or cleaning processes.
Accordingly, an easily implemented method is needed for forming low-k dielectric layers and films with improved damage resistance and dielectric constant stability.